Power Module Packaging (GR-10-01)

Power Module Packaging (GR-10-01)
Principal Investigator: Dr. Simon Ang

The first phase of the Power Module Packaging Project concentrated on achieving the high-voltage (10 kV or higher) breakdown requirements of the power electronic modules consisting of two power semiconductor devices. A new dielectric based on the polyamide imide embedded with nanoparticles was developed using a sol-gel method. It was demonstrated that this dielectric could increase the breakdown voltage of the power module. Several power module architectures were also developed; in particular, the concept for a double-sided high-voltage power module. For practical applications in grid-tied power electronic applications, the current-carrying capability of these power electronic modules should be increased. Due to the relatively small current-carrying capability of the wide-bandgap power semiconductor devices, it is necessary to parallel several of these devices in practical power electronic modules. As a continuation of the current SiC power module development effort, researchers will work to improve processing capability of high-voltage SiC power modules through optimized device paralleling.