Low Rth, Dense Ceramic Isolation Enabling Direct Substrate Integration on Cold Plate (25-01)

Principal Investigator: Dr. David Huitink

In this effort, we explore the implementation of a sublimated physical vapor deposition of a dense ceramic insulator (AlON) directly into power electronics packaging for achieving first-in-class packaging thermal resistance in a novel substrate technology. Our aim is to reduce the junction-to-fluid thermal resistance for WBG power devices by ~5x. This is made possible through a >99% density ceramic material that allows for thinner dielectric layers, that can be deposited directly onto cooling structures. Following this cooler-substrate fab, electrodeposited Cu routing layers on top of the dielectric coating form the basis of circuit routing, which can be followed by traditional device packaging tools and techniques, such that it can be a drop-in replacement for assembly with patterned DBC/AMB substrates. Initially, the project will focus on the process integration and thermal characterization of these dense ceramic substrates, and initial demonstrations of SiC power device packaging on this platform. Ultimately, the removal of multiple attachment layers and interfaces greatly improves the ability to cool the devices in operation, and moreover, the shift away from sintered ceramic substrates represents a paradigm change in how power electronics modules can be configured.