Principal Investigator: Dr. Adel Nasiri
Wide Band Gap (WBG) power semiconductors, such as Silicon Carbide (SiC) MOSFETs, will have a potentially transformative impact on the power density, efficiency and reliability of Solid State Transformer (SST). High voltage breakdown capability and development of integrate-able MV-rated half-bridge Switch Modules with voltage ratings up to 10kV reduce the number of levels required to implement Medium Voltage (MV) interfacing converters. Today, engineering samples of 15kV rated SiC MOSFETs and 24kV SiC IGBTs have been built and tested in the literature with the possibility of up to 30kV rated devices on the horizon. However, achievement of the same or higher power throughput in WBG-based SSTs, with higher rated devices, is limited by the complex design considerations and trade-offs within the medium frequency transformer design such as switching frequency, dv/dt, core losses, core saturation and inter-winding insulation, winding-to-core insulation and ground-wall insulation. Further complicating the drive towards higher power throughput is the coupling of thermal management into the ground-wall insulation requirements at the system level. The collective impact of these considerations is limiting the reported 13.8kV-connected medium frequency transformer power throughput to levels below 50kVA.
The goal of this project is to develop a Medium Voltage (MV), high power, high frequency dual active bridge as a building block for future MV AC and DC systems. The input voltage is 13kVDC and output voltage is 7.2kV. The power rating is at 667MVA for a 2MVA three-phase system operating at 20kHz. The project pushes the envelope on power and voltage levels for power electronics systems. It has four major tasks: (i) topology development, (ii) controls and modeling, (iii) transformer design and development, and (iv) packaging considering creepage and clearance distances and common mode noise. The controls, modeling, and loss of the entire system has been formulated and conducted. The transformer is designed for appropriate leakage inductance, winding and core insulation, saturation, partial discharge, leakage capacitances, high frequency operation, and thermal management. The H-bridge at the primary is a three-level topology using 10kV SiC MOSFETs. System current for various power transfers has been formulated to achieve minimum RMS and reduced loss. The modeling is performed in ANSYS multi-physics for the H-bridges and transformer.