Principal Investigator: Dr. Yue Zhao
The goal of this project is to develop a 99% efficient single-stage all SiC medium-voltage (MV) dc transformer (DCX), which is the most critical circuity in a solid-state transformer (SST). Compare to the state-of-the-art SSTs, where series connection of multiple cells on the MV ac side is usually required, in this project, 10 kV SiC MOSFET modules will be adopted to enable a single-stage DCX from 7.2 kV to 400 Vdc. This design concept will lead to higher reliability, higher efficiency and higher power density compared to the state-of-the-art SST.
When circuit topology is simplified, the design challenges are shifted to the design of the medium frequency (MF) transformer, which will be a key task in this project. A Pareto-front analysis based multi-objective optimization approach for transformer design will be utilized in this proposal to identify the optimal operating conditions of the transformer. In addition, to exploit the benefit of SiC MV modules, gate drivers, especially the design of gate driver power supply (GDPS) could always be challenging. In this project an innovative GDPS using wireless power transfer (WPT) is proposed to ensure a sufficient insulation voltage and meet the safety requirements of clearance and creepage specified in IEC 61800-5-1. The goal of this project will be achieved through a thorough investigation of the formal design approach for the MF transformer and the WPT based GDPS. Meanwhile, the prototypes for both will be developed for experimental validations.